Synopsys Hiring Freshers As ‘Intern’ In Hyderabad
Experience Required: Fresher
Last Date to Apply: As Soon As Possible
Candidate Profile and Criteria:
- Candidate should be new college graduate.
- Candidate should have completed B.E/B.Tech in EEE or ECE or VLSI background.
- Candidate should have very good digital logic design and CMOS fundamentals and good communication skills.
- Candidate should have knowledge of Verilog, VLSI Design flow, high level design synthesis, timing concepts is a plus.
Company’s Name: Synopsys
Company’s Website: www.synopsys.com
Synopsys is founded in 1986 by Dr. Aart de Geus and a team of engineers from General Electric’s Microelectronics Center in Research Triangle Park, North Carolina, Synopsys was first established as “Optimal Solutions” with a charter to develop and market ground-breaking synthesis technology developed by the team at General Electric. The company pioneered the commercial application of logic synthesis that has since been adopted by every major semiconductor design company in the world. This technology provided an exponential leap in integrated circuit (IC) design productivity by allowing engineers to specify chip functionality at a higher level of abstraction. Without this technology, the complex designs of today would not be possible. Today, as a leader in electronic design automation (EDA) and semiconductor intellectual property (IP), Synopsys continues to deliver products and services that accelerate innovation in the global electronics market.
Job Details and Description:
- Candidate will be taken as Intern.
- Candidate will have to work in Hyderabad.
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