Synopsys Hiring Freshers As ‘Intern (Technical)’ In Delhi
Eligibility: B.E./B.Tech, M.E./M.Tech
Experience Required: Fresher
Last Date to Apply: As Soon As Possible
Candidate Profile and Criteria:
- Candidate should have minimum Bachelor’s degree in EE.
- Candidate should have good Knowledge of System Verilog.
- Methodology knowledge- exposure of any verification methodology (OVM,UVM,VMM).
- Protocol Knowledge – theoretical knowledge of any one of the protocols (AMBA AHB & AXI / USB / PCIe/Ethernet/SATA/OCP/MIPI/HDMI/I2C/SIO.
Company’s Name: Synopsys
Company’s Website: www.synopsys.com
Synopsys is founded in 1986 by Dr. Aart de Geus and a team of engineers from General Electric’s Microelectronics Center in Research Triangle Park, North Carolina, Synopsys was first established as “Optimal Solutions” with a charter to develop and market ground-breaking synthesis technology developed by the team at General Electric. The company pioneered the commercial application of logic synthesis that has since been adopted by every major semiconductor design company in the world. This technology provided an exponential leap in integrated circuit (IC) design productivity by allowing engineers to specify chip functionality at a higher level of abstraction. Without this technology, the complex designs of today would not be possible. Today, as a leader in electronic design automation (EDA) and semiconductor intellectual property (IP), Synopsys continues to deliver products and services that accelerate innovation in the global electronics market.
Job Details and Description:
- Candidate would be part of the team developing Verification IPs and / or working on SoC verification.
- Person would be working on different phases of development, including design, coding, test planning, test execution, coverage etc.
- The responsibility would also include enhancement of the existing Verification IP products, analyzing customer’s target environment, usage, problems and help them with debugging and providing solutions.
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