synopsys

Job Role: Intern – Technical Engineering

Eligibility: B.E./B.Tech, M.E./M.Tech

Job Location: Noida

Experience Required: Fresher

Last Date to Apply: As Soon As Possible

Candidate Profile and Criteria:

  • This recruitment of Synopsys is for candidate who have completed/pursuing B.E./B.Tech or M.E./M.Tech in EE from a reputed institute.
  • Candidate should have strong Verilog coding skills.
  • Candidate should have strong debugging skills.
  • Candidate should have strong C/C++ or Perl or python scripting skills.
  • Candidate should have knowledge on FPGA Architectures.
  • Highly skilled with one or more industry standard simulation tools.
  • Candidate should have strong understanding of typical design structures (FIFO’s, pipelines, memories, state machines, etc.).
  • Candidate should have excellent written and verbal communication skills.

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Company Profile:

Company’s Name: Synopsys

Company’s Website: www.synopsys.com

Synopsys is founded in 1986 by Dr. Aart de Geus and a team of engineers from General Electric’s Microelectronics Center in Research Triangle Park, North Carolina, Synopsys was first established as “Optimal Solutions” with a charter to develop and market ground-breaking synthesis technology developed by the team at General Electric. The company pioneered the commercial application of logic synthesis that has since been adopted by every major semiconductor design company in the world. This technology provided an exponential leap in integrated circuit (IC) design productivity by allowing engineers to specify chip functionality at a higher level of abstraction. Without this technology, the complex designs of today would not be possible. Today, as a leader in electronic design automation (EDA) and semiconductor intellectual property (IP), Synopsys continues to deliver products and services that accelerate innovation in the global electronics market.

Job Details and Description:

  • The Verification Engineer is responsible for a wide variety of verification tasks, including designing self-checking test benches using modern verification techniques; designing verification components such as bus functional models, monitors, and behavioral models.
    This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results.
  • Salary: Not Disclosed

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